The present invention relates to a field effect transistor with a vertical structure and submicron dimensions, which operates under ballistic or quasi-ballistic conditions. This transistor is intended for ultra-high frequencies up to 100 and 200 GHz; in order to increase its amplification gain and its power, its output impedance is increased by means of a decoupling between the gate to which is applied the ultra-high frequency signal and the drain by a second gate, i.e. it is a tetrode transistor.
The transistor according to the invention is of the metal-semiconductor or metal-insulator-semiconductor types, because in the case of a vertical structure and particularly if it is submicronic, it is not possible to envisage pn junctions between layers of semiconductor materials on the sides of a mesa. It is therefore a metal-semiconductor transistor or MESFET, or a metal-insulator-semiconductor transistor or MISFET, but with a view to simplifying the explanations or drawings, the invention will be described relative to a MESFET.
In the same way, ultra-high frequency transistors, i.e. those operating at frequencies well beyond 1 GHz, are presently made from materials of groups III-V, particularly if they have a submicron gate length. The invention is also applicable to silicon transistors, but a silicon transistor is far from having the ultra-high frequency performance levels of a gallium arsenide transistor and consequently the invention is described relative to the case of a GaAs transistor, although the invention also relates to materials such as GaAlAs, GaInAs, InP, etc.
In a submicron vertical transistor, the output impedance between the source and drain is of low value, because submicron transistors have very small source and drain dimensions. It is consequently not possible to obtain a high impedance through a fine material layer which forms the active layer. In order to increase the available power, the field effect of the gate on the output of the transistor and which is the cause of this low impedance value is interrupted, so as to bring about a better coupling of the gate, representing the transistor input, from the drain. This decoupling is obtained by placing a device between gate and drain which develops a second negative potential zone, which is not modulated because it is connected in current source and controlled by a fixed gate voltage. Thus, this decoupling device is constituted by a sescond gate electrode, which is located between the first transistor gate and the drain. In a vertical structure, the two gates are deposited on the sides of the mesa in which passes the channel. In the case of a submicron structure, said mesa has a height of approximately 0.4 micron and the process according to the invention describes the production of such a transistor, which has two gates, whereof one is displaced relative to the other and is located between the ultra-high frequency gate and the drain.